3-Line To 8-Line Decoder SN74LS138N View larger

3-Line To 8-Line Decoder SN74LS138N



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These Schottky-damped TTL MSJ circuits are designed to be used in
high-performance memory decoding or data-routing applications requiring very short propagation
delay times. In high-performance memory systems, these decoders can be used to minimize
the effects of system decoding. When employed with high­ speed memories utilizing a fast
enable circuit, the delay times of these decoders and the enable time of the memory are
usually less than the typical access time of the memory. This means that the effective system
delay introduced by the Schottky-damped system decoder is negligible.

The 'LS138, SN54S138, and SN74S138A
decode one of eight lines dependent on the conditions at the three binary select inputs and the
three enable inputs. Two active-low and one active-high enable inputs reduce the need for external
gates or inverters when expanding. A 24-Hne decoder can be implemented without external inverters
and a 32-line decoder requires only one inverter. An enable input can be used as a data input for
demultiplexing applications.

All of these decoder/demultiplexers feature fully buffered inputs, each of which represents only
one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky
diodes to suppress line-ringing and to simplify system design.

The SN54LS138 and SN54S138 are characterized for operation over the full military temperature range
of -55 °C to 125 °C. The SN74LS 138 and SN74S 1 38A are characterized for operation from 0°C to

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